Year

2015

Degree Name

Master of Engineering - Research

Department

School of Electrical, Computer and Telecommunications Engineering

Abstract

Power line communications (PLC) operates by transmitting modulated data signal through the electrical power transmission and distribution cables. Nowadays, PLC has been recognised as a promising alternative communication technology due to the universal existence of power lines, which saves human and material resources from establishing additional communication infrastructures. However, power lines were originally devised to deliver electrical power rather than signal data. Thus, signal transmitted through PLC channel suffers from severe inter-symbol interference (ISI) and strong impulsive noise (IN), degrading the reliability of data transmission. Except for ISI and IN, in order to avoid interference to other communication systems, electromagnetic compatibility constraints regulate a limit to the signal power transmitted in the power line systems.

To date, multicarrier modulation, e.g., orthogonal frequency division multiplexing (OFDM), based PLC systems have been advocated to combat ISI. Besides, several IN mitigation approaches have been introduced to OFDM to eliminate the detrimental impact of IN. However, the inherent large peak-to-average power ratio (PAPR) of the OFDM signals makes IN detection difficult, and the OFDM based PLC system may not be the best choice under hostile PLC channels.

In comparison with OFDM, this thesis proposes to use single carrier modulation due to its low PAPR. Specifically, a novel iterative receiver, i.e., single carrier modulation with frequency-domain turbo equalisation (SC-FDTE) coupled with an iterative IN estimation and cancellation (IN-EC) module, is developed for PLC. The frequency domain equaliser is implemented based on linear minimum mean square error (LMMSE) algorithm, which significantly reduces computational complexity compared with the time-domain equalisation. Moreover, powerful turbo (iterative) equalisation is used to handle severe ISI. The iterative IN-EC module is designed to combat the impact of IN, which includes the components of IN location detection, IN estimation and IN cancellation. For the IN location detection component, two IN detection methods are developed to be implemented: the sorting based method and the thresholding based method. After IN estimation and cancellation, the IN-EC provides an ‘IN free’ (residual IN may still exist) received signal to the equaliser. It is worth highlighting that the novel receiver facilitates an iterative operation between the equaliser and the IN-EC. Hence, both of the equaliser and IN-EC are able to enhance their performance iteratively, thereby leading to a significant improvement in system performance.

Simulation results demonstrate that, compared with the conventional non-iterative OFDM and single-carrier frequency-domain equalisation (SC-FDE) based PLC systems, which both combined with non-iterative IN mitigation approaches, PLC system with the proposed iterative receiver can achieve a remarkable performance gain, i.e., 20 dB as shown in Chapter 3, under a typical 4-path reference PLC channel at a bit error rate of 10−5.

FoR codes (2008)

090609 Signal Processing

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Unless otherwise indicated, the views expressed in this thesis are those of the author and do not necessarily represent the views of the University of Wollongong.