Convolutional neural network acceleration with hardware/software co-design

Authors

Andrew Tzer-Yeu Chen, University of AucklandFollow
Morteza Biglari-Abhari, University of Auckland
Kevin I-Kai Wang, University of Auckland
Abdesselam Bouzerdoum, University of WollongongFollow
Fok Hing Chi Tivive, University of WollongongFollow

RIS ID

115880

Publication Details

A. Tzer-Yeu. Chen, M. Biglari-Abhari, K. I-Kai. Wang, A. Bouzerdoum & F. Tivive, "Convolutional neural network acceleration with hardware/software co-design," Applied Intelligence, vol. 48, (5) pp. 1288-1301, 2018.

Abstract

Convolutional Neural Networks (CNNs) have a broad range of applications, such as image processing and natural language processing. Inspired by the mammalian visual cortex, CNNs have been shown to achieve impressive results on a number of computer vision challenges, but often with large amounts of processing power and no timing restrictions. This paper presents a design methodology for accelerating CNNs using Hardware/Software Co-design techniques, in order to balance performance and flexibility, particularly for resource-constrained systems. The methodology is applied to a gender recognition case study, using an ARM processor and FPGA fabric to create an embedded system that can process facial images in real-time.