A novel design of an ultra-low-cost (m × n) multilayer RAM structure in quantum-dot cellular automata nanotechnology
Analog Integrated Circuits and Signal Processing
Quantum-dot cellular automata is pioneering nanotechnology, which has gained attention amongst the research community as a solid potential substitute against complementary metal oxide semiconductor (CMOS) technology. This paper explores a unique loop-based random-access memory (RAM) circuit with an asynchronous set and resets by utilizing an innovative (2 × 1) multiplexer and a D-latch in the design. Efficient designs of (1 × 4) RAM and (4 × 4) RAM, structured in three-layer, are implemented. The proposed multilayer designs are improved up to 20–30% over the existing single-layer and multilayer designs in terms of the total number of cells counts, area, latency, and overall cost. The proposed (4 × 4) RAM and (m × n) RAM structures show the excellent scalability of the projected RAM cells in designing complex circuits. The simulation results have been obtained, and their accuracy has been checked using QCADesigner 2.0.3 tool.
Open Access Status
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