Publication Details

Li, H., Ma, X., Cui, B., Wang, Y., Zhang, C., Zhao, J., Zhang, Z., Tang, C. & Li, E. (2017). Chip-scale demonstration of hybrid III-V/silicon photonic integration for an FBG interrogator. Optica, 4 (7), 692-700.

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© 2017 Optical Society of America. Users may use, reuse, and build upon the article, or use the article for text or data mining, so long as such uses are for non-commercial purposes and appropriate attribution is maintained. All other rights are reserved.


Silicon photonic integration is a means to produce an integrated on-chip fiber Bragg grating (FBG) interrogator. The possibility of integrating the light source, couplers, grating couplers, de-multiplexers, photodetectors (PDs), and other optical elements of the FBG interrogator into one chip may result in game-changing performance advances, considerable energy savings, and significant cost reductions. To the best of our knowledge, this paper is the first to present a hybrid silicon photonic chip based on III–V/silicon-on-insulator photonic integration for an FBG interrogator. The hybrid silicon photonic chip consists of a multiwavelength vertical-cavity surface-emitting laser array and input grating couplers, a multimode interference coupler, an arrayed waveguide grating, output grating couplers, and a PD array. The chip can serve as an FBG interrogator on a chip and offer unprecedented opportunities. With a footprint of 5mm x 3mm, the proposed hybrid silicon photonic chip achieves an interrogation wavelength resolution of approximately 1 pm and a wavelength accuracy of about ±10 pm. With the measured 1 pm wavelength resolution, the temperature measurement resolution of the proposed chip is approximately 0.1°C. The proposed hybrid silicon photonic chip possesses advantages in terms of cost, manufacturability, miniaturization, and performance. The chip supports applications that require extreme miniaturization down to the level of smart grains.



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