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Design, modelling, characterisation and analysis of biasing techniques for saturated-core Fault Current Limiters

thesis
posted on 2024-11-16, 01:12 authored by Jonathan Charles Knott
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History

Year

2016

Thesis type

  • Not specified

Faculty/School

School of Electrical, Computer and Telecommunications Engineering

Language

English

Notes

This thesis is unavailable due to its continuing embargo.

Disclaimer

Unless otherwise indicated, the views expressed in this thesis are those of the author and do not necessarily represent the views of the University of Wollongong.

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    Keywords

    engineering

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    Copyright - All rights reserved

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