Implementation of a quasi-digital ADC on PLD

Authors

Fu-yuan Wang, Zhengzhou University
Yong-liang Li, Zhengzhou University
Jiangto Xi, Faculty of Informatics, University of WollongongFollow
Joe F. Chicharo, University of WollongongFollow

RIS ID

17661

Publication Details

Wang, F., Li, Y., Xi, J. & Chicharo, J. F. (2006). Implementation of a quasi-digital ADC on PLD. Proceedings of 2006 8th International Conference on Solid State and Integrated Circuit Technology (pp. 1791-1793). Piscataway, USA: IEEE.

Abstract

This paper presents a new way to implement stochastic logic-based analog-to-digit converters (ADCs) on a programmable logic device (PLD) chip. The proposed implementation is almost all digitalized so that the design can be done by using hardware description language and the results can be easily downloaded into a PLD chip. Both simulation and hardware test results are given.